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کامپیوتر و شبکه::
بافر پهلونگر ترجمه
A hardware component called the Translation Lookaside Buffer (TLB) holds a cache of mappings from virtual memory pages to their physical memory counterparts.
Depending on the system architecture, TLBs may be filled by hardware or software.
For hardware-filled TLBs, the system implementation must ensure that the page table entries used to fill the TLB cannot be modified by attackers.
For software-filled TLBs, the refill code and data used by the code must be isolated from any attacker behavior.
Contrast this with modern systems, which authorize memory access at the page level, with a simple check on the page table or TLB entry for read or write access.
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